Coverage for tsfpga/examples/example_env.py: 0%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://github.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9""" 

10Common functions and definitions in the example build environment. 

11""" 

12 

13# Standard libraries 

14from typing import TYPE_CHECKING, Optional 

15 

16if TYPE_CHECKING: 

17 from tsfpga.module_list import ModuleList 

18 

19# Import before others since it modifies PYTHONPATH. pylint: disable=unused-import 

20import tsfpga.examples.example_pythonpath # noqa: F401 

21 

22# Third party libraries 

23from hdl_registers.register import Register 

24 

25# First party libraries 

26import tsfpga 

27from tsfpga.module import get_modules 

28 

29TSFPGA_EXAMPLES_TEMP_DIR = tsfpga.TSFPGA_GENERATED 

30 

31 

32def get_default_registers() -> list[Register]: 

33 """ 

34 Default registers for tsfpga examples. 

35 """ 

36 registers = [ 

37 Register("config", 0, "r_w", "Configuration register."), 

38 Register( 

39 "command", 

40 1, 

41 "wpulse", 

42 "When this register is written, all '1's in the written word will be asserted for one " 

43 "clock cycle in the FPGA logic.", 

44 ), 

45 Register("status", 2, "r", "Status register."), 

46 Register( 

47 "irq_status", 

48 3, 

49 "r_wpulse", 

50 "Reading a '1' in this register means the corresponding interrupt has triggered.\n" 

51 "Writing to this register will clear the interrupts where there is a '1' in the " 

52 "written word.", 

53 ), 

54 Register( 

55 "irq_mask", 

56 4, 

57 "r_w", 

58 "A '1' in this register means that the corresponding interrupt is enabled.", 

59 ), 

60 ] 

61 return registers 

62 

63 

64def get_tsfpga_example_modules( 

65 names_include: Optional[set[str]] = None, names_avoid: Optional[set[str]] = None 

66) -> "ModuleList": 

67 """ 

68 Wrapper of the regular :func:`.get_modules`. call with correct settings for tsfpga 

69 example modules. 

70 This will include the example tsfpga modules, but not the "real" modules. 

71 

72 Arguments will be passed on to :func:`.get_modules`. 

73 """ 

74 return get_modules( 

75 modules_folders=[tsfpga.TSFPGA_EXAMPLE_MODULES], 

76 names_include=names_include, 

77 names_avoid=names_avoid, 

78 library_name_has_lib_suffix=False, 

79 default_registers=get_default_registers(), 

80 ) 

81 

82 

83def get_hdl_modules( 

84 names_include: Optional[set[str]] = None, names_avoid: Optional[set[str]] = None 

85) -> "ModuleList": 

86 """ 

87 Wrapper of :func:`.get_modules` which returns the ``hdl-modules`` module objects 

88 (https://hdl-modules.com), if available. 

89 

90 If ``hdl-modules`` can not be found in the default repo checkout location, 

91 the function will assert False. 

92 

93 Arguments will be passed on to :func:`.get_modules`. 

94 

95 Return: 

96 :class:`.ModuleList`: The module objects. 

97 """ 

98 # Presumed location of the hdl-modules repo 

99 hdl_modules_repo_root = tsfpga.REPO_ROOT.parent.parent.resolve() / "hdl-modules" / "hdl-modules" 

100 if (hdl_modules_repo_root / "modules").exists(): 

101 return get_modules( 

102 modules_folders=[hdl_modules_repo_root / "modules"], 

103 names_include=names_include, 

104 names_avoid=names_avoid, 

105 library_name_has_lib_suffix=False, 

106 ) 

107 

108 raise FileNotFoundError( 

109 f"The hdl-modules modules could not be found. Searched in {hdl_modules_repo_root}" 

110 )