Coverage for tsfpga/examples/simulate.py: 0%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://gitlab.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9# Standard libraries 

10import sys 

11from pathlib import Path 

12 

13# Do PYTHONPATH insert() instead of append() to prefer any local repo checkout over any pip install 

14PATH_TO_TSFPGA = Path(__file__).parent.parent.parent.resolve() 

15sys.path.insert(0, str(PATH_TO_TSFPGA)) 

16 

17# Import before others since it modifies PYTHONPATH. pylint: disable=unused-import 

18import tsfpga.examples.example_pythonpath # noqa: F401 

19 

20# First party libraries 

21import tsfpga 

22import tsfpga.create_vhdl_ls_config 

23from tsfpga.create_ghdl_ls_config import create_ghdl_ls_configuration 

24from tsfpga.examples.example_env import ( 

25 TSFPGA_EXAMPLES_TEMP_DIR, 

26 get_hdl_modules, 

27 get_tsfpga_example_modules, 

28) 

29from tsfpga.examples.simulation_utils import ( 

30 SimulationProject, 

31 create_vhdl_ls_configuration, 

32 get_arguments_cli, 

33) 

34from tsfpga.git_simulation_subset import GitSimulationSubset 

35 

36 

37def main(): 

38 """ 

39 Main function for the simulation flow. If you are setting up a new simulation environment 

40 you probably want to copy and modify this function. The other functions and classes 

41 should be reusable in most cases. 

42 """ 

43 cli = get_arguments_cli(default_output_path=TSFPGA_EXAMPLES_TEMP_DIR) 

44 args = cli.parse_args() 

45 

46 modules = get_tsfpga_example_modules() 

47 

48 # Avoid the module that depends on Xilinx unisim library 

49 module_names_avoid = ["hard_fifo"] if args.vivado_skip else [] 

50 modules_no_sim = get_hdl_modules(names_avoid=module_names_avoid) 

51 

52 if args.vcs_minimal: 

53 if args.test_patterns != "*": 

54 sys.exit( 

55 "Can not specify a test pattern when using the --vcs-minimal flag." 

56 f" Got {args.test_patterns}", 

57 ) 

58 

59 test_filters = find_git_test_filters( 

60 args=args, 

61 repo_root=tsfpga.REPO_ROOT, 

62 modules=modules, 

63 modules_no_sim=modules_no_sim, 

64 reference_branch="origin/main", 

65 ) 

66 if not test_filters: 

67 print("Nothing to run. Appears to be no VHDL-related git diff.") 

68 return 

69 

70 # Override the test pattern argument to VUnit 

71 args.test_patterns = test_filters 

72 print(f"Running VUnit with test pattern {args.test_patterns}") 

73 

74 # Enable minimal compilation in VUnit 

75 args.minimal = True 

76 

77 simulation_project = SimulationProject(args=args) 

78 simulation_project.add_modules(args=args, modules=modules, modules_no_sim=modules_no_sim) 

79 simlib = simulation_project.add_vivado_simlib(args=args) 

80 ip_core_vivado_project_directory = simulation_project.add_vivado_ip_cores( 

81 args=args, modules=modules + modules_no_sim 

82 ) 

83 

84 create_vhdl_ls_configuration( 

85 output_path=tsfpga.REPO_ROOT, 

86 temp_files_path=TSFPGA_EXAMPLES_TEMP_DIR, 

87 modules=modules + modules_no_sim, 

88 ip_core_vivado_project_directory=ip_core_vivado_project_directory, 

89 ) 

90 

91 create_ghdl_ls_configuration( 

92 output_path=tsfpga.REPO_ROOT, 

93 modules=modules + modules_no_sim, 

94 vunit_proj=simulation_project.vunit_proj, 

95 simlib=simlib, 

96 ) 

97 

98 simulation_project.vunit_proj.main() 

99 

100 

101def find_git_test_filters( 

102 args, 

103 repo_root, 

104 modules, 

105 modules_no_sim=None, 

106 reference_branch="origin/master", 

107 **setup_vunit_kwargs, 

108): 

109 """ 

110 Construct a VUnit test filter that will run all test cases that are affected by git changes. 

111 The current git state is compared to a reference branch, and differences are derived. 

112 See :class:`.GitSimulationSubset` for details. 

113 

114 Arguments: 

115 args: Command line argument namespace. 

116 repo_root (pathlib.Path): Path to the repository root. Git commands will be run here. 

117 modules (ModuleList): Will be passed on to :meth:`.SimulationProject.add_modules`. 

118 modules_no_sim (list(BaseModule)): Will be passed on 

119 to :meth:`.SimulationProject.add_modules`. 

120 reference_branch (str): The name of the reference branch that is used to collect a diff. 

121 setup_vunit_kwargs : Will be passed on to :meth:`.SimulationProject.add_modules`. 

122 

123 Return: 

124 `list(str)`: A list of VUnit test case filters. 

125 """ 

126 # Set up a dummy VUnit project that will be used for dependency scanning. 

127 # Note that sources are added identical to the "real" project above. 

128 simulation_project = SimulationProject(args=args) 

129 simulation_project.add_modules( 

130 args=args, modules=modules, modules_no_sim=modules_no_sim, **setup_vunit_kwargs 

131 ) 

132 

133 testbenches_to_run = GitSimulationSubset( 

134 repo_root=repo_root, 

135 reference_branch=reference_branch, 

136 vunit_proj=simulation_project.vunit_proj, 

137 ).find_subset() 

138 

139 test_filters = [] 

140 for testbench_file_name, library_name in testbenches_to_run: 

141 test_filters.append(f"{library_name}.{testbench_file_name}.*") 

142 

143 return test_filters 

144 

145 

146if __name__ == "__main__": 

147 main()