Coverage for tsfpga/examples/simulate.py: 0%
44 statements
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1# --------------------------------------------------------------------------------------------------
2# Copyright (c) Lukas Vik. All rights reserved.
3#
4# This file is part of the tsfpga project.
5# https://tsfpga.com
6# https://gitlab.com/tsfpga/tsfpga
7# --------------------------------------------------------------------------------------------------
9import sys
10from pathlib import Path
12# Do PYTHONPATH insert() instead of append() to prefer any local repo checkout over any pip install
13PATH_TO_TSFPGA = Path(__file__).parent.parent.parent.resolve()
14sys.path.insert(0, str(PATH_TO_TSFPGA))
16from tsfpga.examples.example_env import get_tsfpga_example_modules, TSFPGA_EXAMPLES_TEMP_DIR
18import tsfpga
19from tsfpga.create_ghdl_ls_config import create_ghdl_ls_configuration
20import tsfpga.create_vhdl_ls_config
21from tsfpga.git_simulation_subset import GitSimulationSubset
22from tsfpga.module import get_hdl_modules
23from tsfpga.examples.simulation_utils import (
24 create_vhdl_ls_configuration,
25 get_arguments_cli,
26 SimulationProject,
27)
30def main():
31 """
32 Main function for the simulation flow. If you are setting up a new simulation environment
33 you probably want to copy and modify this function. The other functions and classes
34 should be reusable in most cases.
35 """
36 cli = get_arguments_cli(default_output_path=TSFPGA_EXAMPLES_TEMP_DIR)
37 args = cli.parse_args()
39 modules = get_tsfpga_example_modules()
41 # Avoid the module that depends on Xilinx unisim library
42 module_names_avoid = ["hard_fifo"] if args.vivado_skip else []
43 modules_no_sim = get_hdl_modules(names_avoid=module_names_avoid)
45 if args.vcs_minimal:
46 if args.test_patterns != "*":
47 sys.exit(
48 "Can not specify a test pattern when using the --vcs-minimal flag."
49 f" Got {args.test_patterns}",
50 )
52 test_filters = find_git_test_filters(
53 args=args, repo_root=tsfpga.REPO_ROOT, modules=modules, modules_no_sim=modules_no_sim
54 )
55 if not test_filters:
56 print("Nothing to run. Appears to be no VHDL-related git diff.")
57 return
59 # Override the test pattern argument to VUnit
60 args.test_patterns = test_filters
61 print(f"Running VUnit with test pattern {args.test_patterns}")
63 # Enable minimal compilation in VUnit
64 args.minimal = True
66 simulation_project = SimulationProject(args=args)
67 simulation_project.add_modules(args=args, modules=modules, modules_no_sim=modules_no_sim)
68 simlib = simulation_project.add_vivado_simlib(args=args)
69 ip_core_vivado_project_directory = simulation_project.add_vivado_ip_cores(
70 args=args, modules=modules + modules_no_sim
71 )
73 create_vhdl_ls_configuration(
74 output_path=tsfpga.REPO_ROOT,
75 temp_files_path=TSFPGA_EXAMPLES_TEMP_DIR,
76 modules=modules + modules_no_sim,
77 ip_core_vivado_project_directory=ip_core_vivado_project_directory,
78 )
80 create_ghdl_ls_configuration(
81 output_path=tsfpga.REPO_ROOT,
82 modules=modules + modules_no_sim,
83 vunit_proj=simulation_project.vunit_proj,
84 simlib=simlib,
85 )
87 simulation_project.vunit_proj.main()
90def find_git_test_filters(args, repo_root, modules, modules_no_sim=None, **setup_vunit_kwargs):
91 """
92 Construct a VUnit test filter that will run all test cases that are affected by git changes.
93 The current git state is compared to origin/master, and differences are derived.
94 See :class:`.GitSimulationSubset` for details.
96 Arguments:
97 args: Command line argument namespace.
98 repo_root (pathlib.Path): Path to the repository root. Git commands will be run here.
99 modules: Will be passed on to :meth:`.SimulationProject.add_modules`.
100 modules_no_sim: Will be passed on to :meth:`.SimulationProject.add_modules`.
101 setup_vunit_kwargs : Will be passed on to :meth:`.SimulationProject.add_modules`.
103 Return:
104 `list(str)`: A list of VUnit test case filters.
105 """
106 # Set up a dummy VUnit project that will be used for dependency scanning.
107 # Note that sources are added identical to the "real" project above.
108 simulation_project = SimulationProject(args=args)
109 simulation_project.add_modules(
110 args=args, modules=modules, modules_no_sim=modules_no_sim, **setup_vunit_kwargs
111 )
113 testbenches_to_run = GitSimulationSubset(
114 repo_root=repo_root,
115 reference_branch="origin/master",
116 vunit_proj=simulation_project.vunit_proj,
117 ).find_subset()
119 test_filters = []
120 for testbench_file_name, library_name in testbenches_to_run:
121 test_filters.append(f"{library_name}.{testbench_file_name}.*")
123 return test_filters
126if __name__ == "__main__":
127 main()