Coverage for tsfpga/test/functional/commercial_simulators/test_simulation.py: 0%

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1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project. 

5# https://tsfpga.com 

6# https://gitlab.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9import os 

10import sys 

11 

12import pytest 

13 

14import tsfpga 

15from tsfpga.system_utils import run_command 

16 

17 

18@pytest.mark.parametrize("vunit_simulator", ["modelsim", "rivierapro", "ghdl"]) 

19def test_hdl_compilation(vunit_simulator, tmp_path): 

20 """ 

21 Compile all the HDL code, no Vivado involvement. This is a subset of 'test_hdl_test_cases', 

22 but is much faster. 

23 """ 

24 command = [ 

25 sys.executable, 

26 str(tsfpga.TSFPGA_EXAMPLES / "simulate.py"), 

27 "--output-path", 

28 str(tmp_path / "vunit_out"), 

29 "--vivado-skip", 

30 "--compile", 

31 ] 

32 

33 env = os.environ.copy() 

34 env["VUNIT_SIMULATOR"] = vunit_simulator 

35 

36 run_command(cmd=command, cwd=str(tmp_path), env=env) 

37 

38 

39@pytest.mark.parametrize("vunit_simulator", ["modelsim", "rivierapro", "ghdl"]) 

40def test_hdl_test_cases(vunit_simulator, tmp_path): 

41 """ 

42 Compile all the HDL code and run all tests that do not contain IP cores. No Vivado involvement. 

43 """ 

44 # Only one license seat for Modelsim and Riviera-PRO 

45 num_threads = 1 if vunit_simulator != "ghdl" else 12 

46 command = [ 

47 sys.executable, 

48 str(tsfpga.TSFPGA_EXAMPLES / "simulate.py"), 

49 "--output-path", 

50 str(tmp_path / "vunit_out"), 

51 "--vivado-skip", 

52 "--num-threads", 

53 str(num_threads), 

54 ] 

55 

56 env = os.environ.copy() 

57 env["VUNIT_SIMULATOR"] = vunit_simulator 

58 

59 run_command(cmd=command, cwd=str(tmp_path), env=env) 

60 

61 

62@pytest.mark.parametrize("vunit_simulator", ["modelsim", "rivierapro", "ghdl"]) 

63def test_simlib_compilation_and_ip_core_test_cases(vunit_simulator, tmp_path): 

64 """ 

65 Compile simlib and generate IP core files. Run the test cases that depend on IP cores. 

66 For GHDL, no tests will be run (but simlib and IP cores will be handled). 

67 """ 

68 test_filter = "module_with_ip_cores.*" 

69 command = [ 

70 sys.executable, 

71 str(tsfpga.TSFPGA_EXAMPLES / "simulate.py"), 

72 "--output-path", 

73 str(tmp_path / "vunit_out"), 

74 "--output-path-vivado", 

75 str(tmp_path), 

76 "--minimal", 

77 test_filter, 

78 ] 

79 

80 env = os.environ.copy() 

81 env["VUNIT_SIMULATOR"] = vunit_simulator 

82 

83 run_command(cmd=command, cwd=str(tmp_path), env=env)