Coverage for tsfpga/test/test_hdl_file.py: 100%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://github.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9# Standard libraries 

10from pathlib import Path 

11 

12# Third party libraries 

13import pytest 

14 

15# First party libraries 

16from tsfpga.hdl_file import HdlFile 

17 

18 

19def test_file_endings(): 

20 assert HdlFile.file_endings == (".vhd", ".vhdl", ".v", ".vh", ".sv", ".svh") 

21 

22 

23def test_file_type(): 

24 assert HdlFile(Path("file.vhd")).type == HdlFile.Type.VHDL 

25 assert HdlFile(Path("file.vhdl")).type == HdlFile.Type.VHDL 

26 

27 assert HdlFile(Path("file.v")).type == HdlFile.Type.VERILOG_SOURCE 

28 assert HdlFile(Path("file.vh")).type == HdlFile.Type.VERILOG_HEADER 

29 

30 assert HdlFile(Path("file.sv")).type == HdlFile.Type.SYSTEMVERILOG_SOURCE 

31 assert HdlFile(Path("file.svh")).type == HdlFile.Type.SYSTEMVERILOG_HEADER 

32 

33 

34def test_unknown_file_ending_raises_exception(): 

35 with pytest.raises(ValueError) as exception_info: 

36 HdlFile(Path("file.unknown")) 

37 assert str(exception_info.value) == "Unsupported HDL file ending: file.unknown" 

38 

39 

40def test_can_cast_to_string_without_error(): 

41 str(HdlFile(Path("file.vhd")))