Coverage for tsfpga/test/test_hdl_file.py: 100%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://github.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9from pathlib import Path 

10 

11import pytest 

12 

13from tsfpga.hdl_file import HdlFile 

14 

15 

16def test_file_endings(): 

17 assert HdlFile.file_endings == (".vhd", ".vhdl", ".v", ".vh", ".sv", ".svh") 

18 

19 

20def test_file_type(): 

21 assert HdlFile(Path("file.vhd")).type == HdlFile.Type.VHDL 

22 assert HdlFile(Path("file.vhdl")).type == HdlFile.Type.VHDL 

23 

24 assert HdlFile(Path("file.v")).type == HdlFile.Type.VERILOG_SOURCE 

25 assert HdlFile(Path("file.vh")).type == HdlFile.Type.VERILOG_HEADER 

26 

27 assert HdlFile(Path("file.sv")).type == HdlFile.Type.SYSTEMVERILOG_SOURCE 

28 assert HdlFile(Path("file.svh")).type == HdlFile.Type.SYSTEMVERILOG_HEADER 

29 

30 

31def test_unknown_file_ending_raises_exception(): 

32 with pytest.raises(ValueError) as exception_info: 

33 HdlFile(Path("file.unknown")) 

34 assert str(exception_info.value) == "Unsupported HDL file ending: file.unknown" 

35 

36 

37def test_can_cast_to_string_without_error(): 

38 str(HdlFile(Path("file.vhd")))