Coverage for tsfpga/vivado/test/test_build_result.py: 100%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://github.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9from tsfpga.vivado.build_result import BuildResult 

10 

11 

12def test_size_summary(): 

13 build_result = BuildResult(name="apa", synthesis_run_name="") 

14 

15 build_result.synthesis_size = {"LUT": 3, "FFs": 4} 

16 expected = """\ 

17Size of apa after synthesis: 

18 - LUT: 3 

19 - FFs: 4""" 

20 assert build_result.size_summary() == expected 

21 

22 build_result.implementation_size = {"LUT": 8, "FFs": 9} 

23 expected = """\ 

24Size of apa after implementation: 

25 - LUT: 8 

26 - FFs: 9""" 

27 assert build_result.size_summary() == expected 

28 

29 

30def test_report(): 

31 build_result = BuildResult(name="apa", synthesis_run_name="") 

32 

33 build_result.synthesis_size = {"LUT": 3, "FFs": 4} 

34 expected = """\ 

35Size of apa after synthesis: 

36 - LUT: 3 

37 - FFs: 4""" 

38 assert build_result.report() == expected 

39 

40 # Add a logic level distribution report 

41 build_result.logic_level_distribution = """\ 

42+-----------------+-------------+-----+----+---+----+ 

43| End Point Clock | Requirement | 0 | 1 | 2 | 3 | 

44+-----------------+-------------+-----+----+---+----+ 

45| clk_fpga_0 | 2.000ns | 491 | 12 | 1 | 11 | 

46+-----------------+-------------+-----+----+---+----+\ 

47""" 

48 expected = """\ 

49Size of apa after synthesis: 

50 - LUT: 3 

51 - FFs: 4 

52Logic level distribution: 

53+-----------------+-------------+-----+----+---+----+ 

54| End Point Clock | Requirement | 0 | 1 | 2 | 3 | 

55+-----------------+-------------+-----+----+---+----+ 

56| clk_fpga_0 | 2.000ns | 491 | 12 | 1 | 11 | 

57+-----------------+-------------+-----+----+---+----+\ 

58""" 

59 assert build_result.report() == expected 

60 assert build_result.maximum_logic_level == 3 

61 

62 

63def test_maximum_logic_level_should_be_none_if_no_logic_level_distribution_is_set(): 

64 build_result = BuildResult(name="apa", synthesis_run_name="") 

65 build_result.synthesis_size = {"LUT": 3, "FFs": 4} 

66 

67 # maximum_logic_level is calculated based on the logic_level_distribution, which is not set 

68 # in this test case 

69 assert build_result.logic_level_distribution is None 

70 assert build_result.maximum_logic_level is None 

71 assert "level" not in build_result.report()