Coverage for tsfpga/vivado/test/test_simlib_commercial.py: 100%
59 statements
« prev ^ index » next coverage.py v7.6.9, created at 2024-12-20 20:52 +0000
« prev ^ index » next coverage.py v7.6.9, created at 2024-12-20 20:52 +0000
1# --------------------------------------------------------------------------------------------------
2# Copyright (c) Lukas Vik. All rights reserved.
3#
4# This file is part of the tsfpga project, a project platform for modern FPGA development.
5# https://tsfpga.com
6# https://github.com/tsfpga/tsfpga
7# --------------------------------------------------------------------------------------------------
9# Standard libraries
10from pathlib import Path
11from unittest.mock import MagicMock, patch
13# Third party libraries
14import pytest
16# First party libraries
17from tsfpga.test.test_utils import file_contains_string
18from tsfpga.vivado.simlib import VivadoSimlib
21# pylint: disable=redefined-outer-name
22@pytest.fixture
23def simlib_test(tmp_path):
24 class SimlibCommercialTestFixture:
25 def __init__(self):
26 self.output_path = tmp_path / "simlib"
28 self.simulator_prefix = "/opt/Aldec/Riviera-PRO-2018.10-x64/bin"
29 self.vivado_path = Path("/tools/xilinx/Vivado/2019.2/bin/vivado")
31 self.vivado_simlib = self.get_vivado_simlib(self.simulator_prefix, self.vivado_path)
33 def get_vivado_simlib(
34 self, simulator_prefix, vivado_path, simulator_class_name="rivierapro"
35 ):
36 simulator_class = MagicMock()
37 simulator_class.name = simulator_class_name
38 simulator_class.find_prefix.return_value = simulator_prefix
40 vunit_proj = MagicMock()
41 vunit_proj._simulator_class = simulator_class # pylint: disable=protected-access
43 return VivadoSimlib.init(self.output_path, vunit_proj, vivado_path)
45 @staticmethod
46 def assert_should_compile(vivado_simlib):
47 assert vivado_simlib.compile_is_needed
48 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as mock:
49 vivado_simlib.compile_if_needed()
50 mock.assert_called_once()
52 @staticmethod
53 def assert_should_not_compile(vivado_simlib):
54 assert not vivado_simlib.compile_is_needed
55 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as mock:
56 vivado_simlib.compile_if_needed()
57 mock.assert_not_called()
59 return SimlibCommercialTestFixture()
62def test_should_not_recompile(simlib_test):
63 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
64 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
67def test_new_simulator_version_should_cause_recompile(simlib_test):
68 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
69 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
71 vivado_simlib = simlib_test.get_vivado_simlib(
72 simulator_prefix="/opt/Aldec/Riviera-PRO-1975.01-x64/bin",
73 vivado_path=simlib_test.vivado_path,
74 )
75 simlib_test.assert_should_compile(vivado_simlib)
76 simlib_test.assert_should_not_compile(vivado_simlib)
79def test_new_vivado_version_should_cause_recompile(simlib_test):
80 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
81 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
83 vivado_simlib = simlib_test.get_vivado_simlib(
84 simulator_prefix=simlib_test.simulator_prefix,
85 vivado_path=Path("/tools/xilinx/Vivado/1337.2/bin/vivado"),
86 )
87 simlib_test.assert_should_compile(vivado_simlib)
88 simlib_test.assert_should_not_compile(vivado_simlib)
91def test_remapping_of_vivado_simulator_names(simlib_test):
92 def check_simulator_name(vivado_simlib, name):
93 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as _:
94 vivado_simlib.compile_if_needed()
96 assert file_contains_string(
97 file=vivado_simlib.output_path / "compile_simlib.tcl",
98 string=f"compile_simlib -simulator {name} -simulator_exec_path ",
99 )
101 # Regular Siemens ModelSim should be called "modelsim"
102 vivado_simlib = simlib_test.get_vivado_simlib(
103 simulator_prefix=Path("/opt/intelFPGA/20.1/modelsim_ase/bin/"),
104 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
105 simulator_class_name="modelsim",
106 )
107 check_simulator_name(vivado_simlib=vivado_simlib, name="modelsim")
109 # Siemens Questa is called "modelsim" in VUnit but Vivado needs the name "questasim".
110 vivado_simlib = simlib_test.get_vivado_simlib(
111 simulator_prefix=Path("/opt/intelFPGA_pro/22.2/questa_fse/bin"),
112 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
113 simulator_class_name="modelsim",
114 )
115 check_simulator_name(vivado_simlib=vivado_simlib, name="questasim")
117 # Aldec Riviera-PRO is called "rivierapro" in VUnit but Vivado needs the name "riviera"
118 vivado_simlib = simlib_test.get_vivado_simlib(
119 simulator_prefix=Path("/opt/Aldec/Riviera-PRO-1975.01-x64/bin"),
120 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
121 simulator_class_name="rivierapro",
122 )
123 check_simulator_name(vivado_simlib=vivado_simlib, name="riviera")