Coverage for tsfpga/vivado/test/test_simlib_commercial.py: 100%
59 statements
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« prev ^ index » next coverage.py v7.8.0, created at 2025-04-01 20:51 +0000
1# --------------------------------------------------------------------------------------------------
2# Copyright (c) Lukas Vik. All rights reserved.
3#
4# This file is part of the tsfpga project, a project platform for modern FPGA development.
5# https://tsfpga.com
6# https://github.com/tsfpga/tsfpga
7# --------------------------------------------------------------------------------------------------
9from pathlib import Path
10from unittest.mock import MagicMock, patch
12import pytest
14from tsfpga.test.test_utils import file_contains_string
15from tsfpga.vivado.simlib import VivadoSimlib
17# ruff: noqa: SLF001
20@pytest.fixture
21def simlib_test(tmp_path):
22 class SimlibCommercialTestFixture:
23 def __init__(self):
24 self.output_path = tmp_path / "simlib"
26 self.simulator_prefix = "/opt/Aldec/Riviera-PRO-2018.10-x64/bin"
27 self.vivado_path = Path("/tools/xilinx/Vivado/2019.2/bin/vivado")
29 self.vivado_simlib = self.get_vivado_simlib(self.simulator_prefix, self.vivado_path)
31 def get_vivado_simlib(
32 self, simulator_prefix, vivado_path, simulator_class_name="rivierapro"
33 ):
34 simulator_class = MagicMock()
35 simulator_class.name = simulator_class_name
36 simulator_class.find_prefix.return_value = simulator_prefix
38 vunit_proj = MagicMock()
39 vunit_proj._simulator_class = simulator_class
41 return VivadoSimlib.init(self.output_path, vunit_proj, vivado_path)
43 @staticmethod
44 def assert_should_compile(vivado_simlib):
45 assert vivado_simlib.compile_is_needed
46 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as mock:
47 vivado_simlib.compile_if_needed()
48 mock.assert_called_once()
50 @staticmethod
51 def assert_should_not_compile(vivado_simlib):
52 assert not vivado_simlib.compile_is_needed
53 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as mock:
54 vivado_simlib.compile_if_needed()
55 mock.assert_not_called()
57 return SimlibCommercialTestFixture()
60def test_should_not_recompile(simlib_test):
61 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
62 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
65def test_new_simulator_version_should_cause_recompile(simlib_test):
66 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
67 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
69 vivado_simlib = simlib_test.get_vivado_simlib(
70 simulator_prefix="/opt/Aldec/Riviera-PRO-1975.01-x64/bin",
71 vivado_path=simlib_test.vivado_path,
72 )
73 simlib_test.assert_should_compile(vivado_simlib)
74 simlib_test.assert_should_not_compile(vivado_simlib)
77def test_new_vivado_version_should_cause_recompile(simlib_test):
78 simlib_test.assert_should_compile(simlib_test.vivado_simlib)
79 simlib_test.assert_should_not_compile(simlib_test.vivado_simlib)
81 vivado_simlib = simlib_test.get_vivado_simlib(
82 simulator_prefix=simlib_test.simulator_prefix,
83 vivado_path=Path("/tools/xilinx/Vivado/1337.2/bin/vivado"),
84 )
85 simlib_test.assert_should_compile(vivado_simlib)
86 simlib_test.assert_should_not_compile(vivado_simlib)
89def test_remapping_of_vivado_simulator_names(simlib_test):
90 def check_simulator_name(vivado_simlib, name):
91 with patch("tsfpga.vivado.simlib_commercial.run_vivado_tcl", autospec=True) as _:
92 vivado_simlib.compile_if_needed()
94 assert file_contains_string(
95 file=vivado_simlib.output_path / "compile_simlib.tcl",
96 string=f"compile_simlib -simulator {name} -simulator_exec_path ",
97 )
99 # Regular Siemens ModelSim should be called "modelsim"
100 vivado_simlib = simlib_test.get_vivado_simlib(
101 simulator_prefix=Path("/opt/intelFPGA/20.1/modelsim_ase/bin/"),
102 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
103 simulator_class_name="modelsim",
104 )
105 check_simulator_name(vivado_simlib=vivado_simlib, name="modelsim")
107 # Siemens Questa is called "modelsim" in VUnit but Vivado needs the name "questasim".
108 vivado_simlib = simlib_test.get_vivado_simlib(
109 simulator_prefix=Path("/opt/intelFPGA_pro/22.2/questa_fse/bin"),
110 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
111 simulator_class_name="modelsim",
112 )
113 check_simulator_name(vivado_simlib=vivado_simlib, name="questasim")
115 # Aldec Riviera-PRO is called "rivierapro" in VUnit but Vivado needs the name "riviera"
116 vivado_simlib = simlib_test.get_vivado_simlib(
117 simulator_prefix=Path("/opt/Aldec/Riviera-PRO-1975.01-x64/bin"),
118 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"),
119 simulator_class_name="rivierapro",
120 )
121 check_simulator_name(vivado_simlib=vivado_simlib, name="riviera")