GCC Code Coverage Report
Directory: generated/vunit_out/preprocessed/ Exec Total Coverage
File: generated/vunit_out/preprocessed/artyz7/artyz7_top_pkg.vhd Lines: 9 9 100.0 %
Date: 2021-06-12 04:12:08 Branches: 11 17 64.7 %

Line Branch Exec Source
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-- -------------------------------------------------------------------------------------------------
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-- Copyright (c) Lukas Vik. All rights reserved.
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--
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-- This file is part of the tsfpga project.
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-- https://tsfpga.com
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-- https://gitlab.com/tsfpga/tsfpga
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-- -------------------------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library common;
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use common.addr_pkg.all;
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library reg_file;
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use reg_file.reg_file_pkg.all;
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package artyz7_top_pkg is
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  ------------------------------------------------------------------------------
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  constant ddr_buffer_regs_idx : integer := 3;
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  subtype dummy_reg_slaves is integer range 0 to 2;
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  constant regs_addr_mask : addr_t := x"0000_f000";
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  constant ddr_buffer_regs_base_addr : addr_t := x"0000_3000";
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  constant reg_slaves : addr_and_mask_vec_t(0 to 4 - 1) := (
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    0 => (addr => x"0000_0000", mask => regs_addr_mask),
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    1 => (addr => x"0000_1000", mask => regs_addr_mask),
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    2 => (addr => x"0000_2000", mask => regs_addr_mask),
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    ddr_buffer_regs_idx => (addr => ddr_buffer_regs_base_addr, mask => regs_addr_mask)
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  );
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  ------------------------------------------------------------------------------
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  constant m_gp0_data_width : integer := 32;
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  constant m_gp0_addr_width : integer := 32;
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  constant s_hp0_data_width : integer := 64;
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  constant s_hp0_addr_width : integer := 32;
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end;