GCC Code Coverage Report
Directory: generated/vunit_out/preprocessed/ Exec Total Coverage
File: generated/vunit_out/preprocessed/ddr_buffer/ddr_buffer_regs_pkg.vhd Lines: 19 19 100.0 %
Date: 2021-06-12 04:12:08 Branches: 47 78 60.3 %

Line Branch Exec Source
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-- This file is automatically generated by tsfpga.
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-- Generated 2021-06-12 04:06 from file regs_ddr_buffer.toml at commit 9806b688bef97210.
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-- Register hash 49f915a733d648eeeeaf2e5de68324355045117c, generator version 1.0.4.
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library reg_file;
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use reg_file.reg_file_pkg.all;
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package ddr_buffer_regs_pkg is
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  constant ddr_buffer_config : natural := 0;
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  constant ddr_buffer_command : natural := 1;
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  constant ddr_buffer_status : natural := 2;
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  constant ddr_buffer_irq_status : natural := 3;
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  constant ddr_buffer_irq_mask : natural := 4;
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  constant ddr_buffer_version : natural := 5;
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  function ddr_buffer_addrs_read_addr(array_index : natural) return natural;
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  function ddr_buffer_addrs_write_addr(array_index : natural) return natural;
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  constant ddr_buffer_addrs_array_length : natural := 2;
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  -- Declare register map constants here, but define them in body.
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  -- This is done so that functions have been elaborated when they are called.
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  subtype ddr_buffer_reg_range is natural range 0 to 9;
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  constant ddr_buffer_reg_map : reg_definition_vec_t(ddr_buffer_reg_range);
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  subtype ddr_buffer_regs_t is reg_vec_t(ddr_buffer_reg_range);
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  constant ddr_buffer_regs_init : ddr_buffer_regs_t;
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  subtype ddr_buffer_reg_was_accessed_t is std_logic_vector(ddr_buffer_reg_range);
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  constant ddr_buffer_command_start : natural := 0;
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  constant ddr_buffer_status_idle : natural := 0;
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  subtype ddr_buffer_status_counter is natural range 8 downto 1;
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  subtype ddr_buffer_version_version is natural range 7 downto 0;
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  constant ddr_buffer_constant_axi_data_width : integer := 64;
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  constant ddr_buffer_constant_burst_length_beats : integer := 16;
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  constant ddr_buffer_constant_version : integer := 3;
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end package;
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package body ddr_buffer_regs_pkg is
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  function ddr_buffer_addrs_read_addr(array_index : natural) return natural is
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  begin
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    assert array_index < ddr_buffer_addrs_array_length
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      report "Array index out of bounds: " & natural'image(array_index)
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      severity failure;
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    return 6 + array_index * 2 + 0;
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  end function;
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  function ddr_buffer_addrs_write_addr(array_index : natural) return natural is
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  begin
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    assert array_index < ddr_buffer_addrs_array_length
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      report "Array index out of bounds: " & natural'image(array_index)
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      severity failure;
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    return 6 + array_index * 2 + 1;
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  end function;
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  constant ddr_buffer_reg_map : reg_definition_vec_t(ddr_buffer_reg_range) := (
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    0 => (idx => ddr_buffer_config, reg_type => r_w),
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    1 => (idx => ddr_buffer_command, reg_type => wpulse),
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    2 => (idx => ddr_buffer_status, reg_type => r),
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    3 => (idx => ddr_buffer_irq_status, reg_type => r_wpulse),
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    4 => (idx => ddr_buffer_irq_mask, reg_type => r_w),
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    5 => (idx => ddr_buffer_version, reg_type => r),
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    6 => (idx => ddr_buffer_addrs_read_addr(0), reg_type => r_w),
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    7 => (idx => ddr_buffer_addrs_write_addr(0), reg_type => r_w),
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    8 => (idx => ddr_buffer_addrs_read_addr(1), reg_type => r_w),
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    9 => (idx => ddr_buffer_addrs_write_addr(1), reg_type => r_w)
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  );
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  constant ddr_buffer_regs_init : ddr_buffer_regs_t := (
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    0 => std_logic_vector(to_signed(0, 32)),
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    1 => std_logic_vector(to_signed(0, 32)),
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    2 => std_logic_vector(to_signed(0, 32)),
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    3 => std_logic_vector(to_signed(0, 32)),
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    4 => std_logic_vector(to_signed(0, 32)),
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    5 => std_logic_vector(to_signed(3, 32)),
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    6 => std_logic_vector(to_signed(0, 32)),
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    7 => std_logic_vector(to_signed(0, 32)),
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    8 => std_logic_vector(to_signed(0, 32)),
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    9 => std_logic_vector(to_signed(0, 32))
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  );
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end package body;