Coverage for tsfpga/vivado/test/test_simlib_nvc.py: 100%

1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the tsfpga project, a project platform for modern FPGA development. 

5# https://tsfpga.com 

6# https://github.com/tsfpga/tsfpga 

7# -------------------------------------------------------------------------------------------------- 

8 

9""" 

10Test a subset of what is tested for GHDL, since most of the code is inherited from a 

11common base class. 

12""" 

13 

14from pathlib import Path 

15from unittest.mock import Mock, patch 

16 

17from vunit.sim_if import SimulatorInterface 

18from vunit.ui import VUnit 

19 

20from tsfpga.vivado.simlib import VivadoSimlib 

21 

22 

23def test_version_string(tmp_path): 

24 def get_artifact_name(version_string: str) -> str: 

25 with patch("tsfpga.vivado.simlib_nvc.run_command", autospec=True) as run_command: 

26 run_command.return_value.stdout = version_string 

27 

28 simulator_class = Mock(spec=SimulatorInterface) 

29 simulator_class.name = "nvc" 

30 simulator_class.find_prefix.return_value = "/usr/bin" 

31 

32 vunit_proj = Mock(spec=VUnit) 

33 vunit_proj._simulator_class = simulator_class # noqa: SLF001 

34 

35 return VivadoSimlib.init( 

36 output_path=tmp_path, 

37 vunit_proj=vunit_proj, 

38 vivado_path=Path("/tools/xilinx/Vivado/2019.2/bin/vivado"), 

39 ).artifact_name 

40 

41 assert ".nvc_1_17_devel_1_16_0_r71_gd381db8e." in get_artifact_name( 

42 version_string="nvc 1.17-devel (1.16.0.r71.gd381db8e) (Using LLVM 18.1.3)" 

43 ) 

44 

45 assert ".nvc_1_16_2." in get_artifact_name(version_string="nvc 1.16.2 (Using LLVM 18.1.3)")