Index

_

__init__() (tsfpga.build_project_list.BuildProjectBuildWrapper method) (tsfpga.build_project_list.BuildProjectCreateWrapper method) (tsfpga.build_project_list.BuildProjectList method) (tsfpga.build_project_list.BuildProjectOpenWrapper method) (tsfpga.build_project_list.ThreadSafeCollectArtifacts method) (tsfpga.build_step_tcl_hook.BuildStepTclHook method) (tsfpga.constraint.Constraint method) (tsfpga.formal_project.FormalConfig method) (tsfpga.formal_project.FormalProject method) (tsfpga.formal_project.FormalTestCase method) (tsfpga.git_simulation_subset.GitSimulationSubset method) (tsfpga.hdl_file.HdlFile method) (tsfpga.ip_core_file.IpCoreFile method) (tsfpga.module.BaseModule method) (tsfpga.module_documentation.ModuleDocumentation method) (tsfpga.module_list.ModuleList method) (tsfpga.registers.bit.Bit method) (tsfpga.registers.bit_vector.BitVector method) (tsfpga.registers.constant.Constant method) (tsfpga.registers.parser.RegisterParser method) (tsfpga.registers.register.Register method) (tsfpga.registers.register.RegisterMode method) (tsfpga.registers.register_array.RegisterArray method) (tsfpga.registers.register_c_generator.RegisterCGenerator method) (tsfpga.registers.register_cpp_generator.RegisterCppGenerator method) (tsfpga.registers.register_html_generator.RegisterHtmlGenerator method) (tsfpga.registers.register_list.RegisterList method) (tsfpga.registers.register_python_generator.RegisterPythonGenerator method) (tsfpga.registers.register_vhdl_generator.RegisterVhdlGenerator method) (tsfpga.vhdl_file_documentation.VhdlFileDocumentation method) (tsfpga.vivado.build_result.BuildResult method) (tsfpga.vivado.build_result_checker.BuildResultChecker method) (tsfpga.vivado.build_result_checker.EqualTo method) (tsfpga.vivado.build_result_checker.LessThan method) (tsfpga.vivado.ip_cores.VivadoIpCores method) (tsfpga.vivado.project.VivadoIpCoreProject method) (tsfpga.vivado.project.VivadoNetlistProject method) (tsfpga.vivado.project.VivadoProject method) (tsfpga.vivado.simlib_commercial.VivadoSimlibCommercial method) (tsfpga.vivado.simlib_ghdl.VivadoSimlibGhdl method) (tsfpga.vivado.tcl.VivadoTcl method) (tsfpga.yosys_project.YosysProject method)

A

add_config() (tsfpga.formal_project.FormalProject method) add_constant() (tsfpga.registers.register_list.RegisterList method) add_result() (tsfpga.build_project_list.BuildReport method) add_to_vunit_project() (tsfpga.vivado.simlib_common.VivadoSimlibCommon method) add_vunit_config() (tsfpga.module.BaseModule method) address (tsfpga.registers.register.Register property)

append() (tsfpga.module_list.ModuleList method) append_bit() (tsfpga.registers.register.Register method) append_bit_vector() (tsfpga.registers.register.Register method) append_register() (tsfpga.registers.register_array.RegisterArray method) (tsfpga.registers.register_list.RegisterList method) append_register_array() (tsfpga.registers.register_list.RegisterList method) artifact_name (tsfpga.vivado.simlib_common.VivadoSimlibCommon property)

B

BaseModule (class in tsfpga.module) Bit (class in tsfpga.registers.bit) BitVector (class in tsfpga.registers.bit_vector) build() (tsfpga.build_project_list.BuildProjectList method) (tsfpga.vivado.project.VivadoIpCoreProject method) (tsfpga.vivado.project.VivadoNetlistProject method) (tsfpga.vivado.project.VivadoProject method) (tsfpga.vivado.tcl.VivadoTcl method) build_result_report_length (tsfpga.build_project_list.BuildProjectBuildWrapper property)

BuildProjectBuildWrapper (class in tsfpga.build_project_list) BuildProjectCreateWrapper (class in tsfpga.build_project_list) BuildProjectList (class in tsfpga.build_project_list) BuildProjectOpenWrapper (class in tsfpga.build_project_list) BuildReport (class in tsfpga.build_project_list) BuildResult (class in tsfpga.build_project_list) (class in tsfpga.vivado.build_result) BuildResultChecker (class in tsfpga.vivado.build_result_checker) BuildRunner (class in tsfpga.build_project_list) BuildStepTclHook (class in tsfpga.build_step_tcl_hook)

C

check() (tsfpga.vivado.build_result_checker.BuildResultChecker method) (tsfpga.vivado.build_result_checker.DspBlocks method) (tsfpga.vivado.build_result_checker.EqualTo method) (tsfpga.vivado.build_result_checker.LessThan method) (tsfpga.vivado.build_result_checker.MaximumLogicLevel method) (tsfpga.vivado.build_result_checker.SizeChecker method) check_that_svn_commands_are_available() (in module tsfpga.svn_utils) collect_artifacts() (tsfpga.build_project_list.ThreadSafeCollectArtifacts method) compile() (tsfpga.vivado.simlib_common.VivadoSimlibCommon method) compile_if_needed() (tsfpga.vivado.simlib_common.VivadoSimlibCommon method) compile_is_needed (tsfpga.vivado.simlib_common.VivadoSimlibCommon property) compile_order_file (tsfpga.vivado.ip_cores.VivadoIpCores property) Constant (class in tsfpga.registers.constant) Constraint (class in tsfpga.constraint) copy() (tsfpga.module_list.ModuleList method) copy_and_combine_dicts() (in module tsfpga.vivado.project) copy_source_definition() (tsfpga.registers.register_list.RegisterList method) create() (tsfpga.build_project_list.BuildProjectList method) (tsfpga.vivado.project.VivadoProject method) (tsfpga.vivado.tcl.VivadoTcl method)

create_c_header() (tsfpga.registers.register_list.RegisterList method) create_class() (tsfpga.registers.register_python_generator.RegisterPythonGenerator method) create_configuration() (in module tsfpga.create_vhdl_ls_config) create_cpp_header() (tsfpga.registers.register_list.RegisterList method) create_cpp_implementation() (tsfpga.registers.register_list.RegisterList method) create_cpp_interface() (tsfpga.registers.register_list.RegisterList method) create_directory() (in module tsfpga.system_utils) create_file() (in module tsfpga.system_utils) create_html_constant_table() (tsfpga.registers.register_list.RegisterList method) create_html_page() (tsfpga.registers.register_list.RegisterList method) create_html_register_table() (tsfpga.registers.register_list.RegisterList method) create_python_class() (tsfpga.registers.register_list.RegisterList method) create_regs_vhdl_package() (tsfpga.module.BaseModule method) create_rst_document() (tsfpga.module_documentation.ModuleDocumentation method) create_unless_exists() (tsfpga.build_project_list.BuildProjectList method) create_vhdl_package() (tsfpga.registers.register_list.RegisterList method) create_vivado_project() (tsfpga.vivado.ip_cores.VivadoIpCores method) create_vivado_project_if_needed() (tsfpga.vivado.ip_cores.VivadoIpCores method)

D

default_value (tsfpga.registers.bit.Bit property) (tsfpga.registers.bit_vector.BitVector property) (tsfpga.registers.register.Register property) default_value_str (tsfpga.registers.bit.Bit property) (tsfpga.registers.bit_vector.BitVector property) (tsfpga.registers.register_field.RegisterField property)

default_value_uint (tsfpga.registers.bit.Bit property) (tsfpga.registers.bit_vector.BitVector property) (tsfpga.registers.register_field.RegisterField property) delete() (in module tsfpga.system_utils) DspBlocks (class in tsfpga.vivado.build_result_checker)

E

EqualTo (class in tsfpga.vivado.build_result_checker)

F

Ffs (class in tsfpga.vivado.build_result_checker) file_endings (tsfpga.hdl_file.HdlFile attribute) file_is_in_directory() (in module tsfpga.system_utils) find_git_files() (in module tsfpga.git_utils) find_subset() (tsfpga.git_simulation_subset.GitSimulationSubset method) find_svn_files() (in module tsfpga.svn_utils)

FormalConfig (class in tsfpga.formal_project) FormalProject (class in tsfpga.formal_project) FormalTestCase (class in tsfpga.formal_project) from_archive() (tsfpga.vivado.simlib_common.VivadoSimlibCommon method) from_default_registers() (tsfpga.registers.register_list.RegisterList class method) from_toml() (in module tsfpga.registers.parser)

G

generated_info() (tsfpga.registers.register_list.RegisterList static method) generated_source_info() (tsfpga.registers.register_list.RegisterList method) get() (tsfpga.module_list.ModuleList method) get_build_projects() (tsfpga.module.BaseModule method) get_constant() (tsfpga.registers.register_list.RegisterList method) get_constant_table() (tsfpga.registers.register_html_generator.RegisterHtmlGenerator method) get_doc() (in module tsfpga.about) get_field() (tsfpga.registers.register.Register method) get_formal_files() (tsfpga.module.BaseModule method) get_git_commit() (in module tsfpga.git_utils) get_header() (tsfpga.registers.register_c_generator.RegisterCGenerator method) (tsfpga.registers.register_cpp_generator.RegisterCppGenerator method) get_header_rst() (tsfpga.vhdl_file_documentation.VhdlFileDocumentation method) get_implementation() (tsfpga.registers.register_cpp_generator.RegisterCppGenerator method) get_interface() (tsfpga.registers.register_cpp_generator.RegisterCppGenerator method) get_ip_core_files() (tsfpga.module.BaseModule method) get_maximum_logic_level() (tsfpga.vivado.logic_level_distribution_parser.LogicLevelDistributionParser static method) get_module_object() (in module tsfpga.module) get_modules() (in module tsfpga.module) get_overview_rst() (tsfpga.module_documentation.ModuleDocumentation method) get_package() (tsfpga.registers.register_vhdl_generator.RegisterVhdlGenerator method) get_page() (tsfpga.registers.register_html_generator.RegisterHtmlGenerator method) get_page_style() (tsfpga.registers.register_html_generator.RegisterHtmlGenerator static method) get_register() (tsfpga.registers.register_array.RegisterArray method) (tsfpga.registers.register_list.RegisterList method)

get_register_array() (tsfpga.registers.register_list.RegisterList method) get_register_index() (tsfpga.registers.register_list.RegisterList method) get_register_rst() (tsfpga.module_documentation.ModuleDocumentation method) get_register_table() (tsfpga.registers.register_html_generator.RegisterHtmlGenerator method) get_rst_document() (tsfpga.module_documentation.ModuleDocumentation method) get_scoped_constraints() (tsfpga.module.BaseModule method) get_short_doc() (in module tsfpga.about) get_simulation_files() (tsfpga.module.BaseModule method) get_size() (tsfpga.vivado.hierarchical_utilization_parser.HierarchicalUtilizationParser static method) get_slogan() (in module tsfpga.about) get_start_index() (tsfpga.registers.register_array.RegisterArray method) get_submodule_rst() (tsfpga.module_documentation.ModuleDocumentation method) get_svn_revision() (in module tsfpga.svn_utils) get_svn_revision_information() (in module tsfpga.svn_utils) get_symbolator_component() (tsfpga.vhdl_file_documentation.VhdlFileDocumentation method) get_synthesis_files() (tsfpga.module.BaseModule method) get_table() (tsfpga.vivado.logic_level_distribution_parser.LogicLevelDistributionParser static method) get_value() (tsfpga.registers.bit.Bit method) (tsfpga.registers.bit_vector.BitVector method) (tsfpga.registers.register_field.RegisterField method) get_vivado_path() (in module tsfpga.vivado.common) git_commands_are_available() (in module tsfpga.git_utils) GitSimulationSubset (class in tsfpga.git_simulation_subset)

H

HdlFile (class in tsfpga.hdl_file)

HierarchicalUtilizationParser (class in tsfpga.vivado.hierarchical_utilization_parser) HtmlTranslator (class in tsfpga.registers.html_translator)

I

implementation_size (tsfpga.vivado.build_result.BuildResult attribute) index (tsfpga.registers.register_array.RegisterArray property) init() (tsfpga.vivado.simlib.VivadoSimlib static method) IpCoreFile (class in tsfpga.ip_core_file) is_bus_readable (tsfpga.registers.register.Register property)

is_bus_writeable (tsfpga.registers.register.Register property) is_verilog_header (tsfpga.hdl_file.HdlFile property) is_verilog_source (tsfpga.hdl_file.HdlFile property) is_vhdl (tsfpga.hdl_file.HdlFile property) iterate_module_folders() (in module tsfpga.module)

L

LessThan (class in tsfpga.vivado.build_result_checker) list_tests() (tsfpga.formal_project.FormalProject method) load_python_module() (in module tsfpga.system_utils) load_toml_file() (in module tsfpga.registers.parser)

logic_level_distribution (tsfpga.vivado.build_result.BuildResult property) LogicLevelDistributionParser (class in tsfpga.vivado.logic_level_distribution_parser) LogicLuts (class in tsfpga.vivado.build_result_checker) LutRams (class in tsfpga.vivado.build_result_checker)

M

maximum_logic_level (tsfpga.vivado.build_result.BuildResult attribute) MaximumLogicLevel (class in tsfpga.vivado.build_result_checker) module tsfpga tsfpga.about tsfpga.build_project_list tsfpga.build_step_tcl_hook tsfpga.constraint tsfpga.create_vhdl_ls_config tsfpga.formal_project tsfpga.git_simulation_subset tsfpga.git_utils tsfpga.hdl_file tsfpga.ip_core_file tsfpga.module tsfpga.module_documentation tsfpga.module_list tsfpga.registers tsfpga.registers.bit tsfpga.registers.bit_vector tsfpga.registers.constant tsfpga.registers.html_translator tsfpga.registers.parser tsfpga.registers.register tsfpga.registers.register_array tsfpga.registers.register_c_generator tsfpga.registers.register_code_generator tsfpga.registers.register_cpp_generator tsfpga.registers.register_field tsfpga.registers.register_html_generator tsfpga.registers.register_list tsfpga.registers.register_python_generator tsfpga.registers.register_vhdl_generator tsfpga.sby_writer tsfpga.svn_utils tsfpga.system_utils tsfpga.vhdl_file_documentation tsfpga.vivado tsfpga.vivado.build_result tsfpga.vivado.build_result_checker tsfpga.vivado.common tsfpga.vivado.hierarchical_utilization_parser tsfpga.vivado.ip_cores tsfpga.vivado.logic_level_distribution_parser tsfpga.vivado.project tsfpga.vivado.simlib tsfpga.vivado.simlib_commercial tsfpga.vivado.simlib_common tsfpga.vivado.simlib_ghdl tsfpga.vivado.tcl tsfpga.yosys_project

ModuleDocumentation (class in tsfpga.module_documentation) ModuleList (class in tsfpga.module_list)

N

name (tsfpga.formal_project.FormalTestCase property) (tsfpga.ip_core_file.IpCoreFile property)

O

open() (tsfpga.build_project_list.BuildProjectList method) (tsfpga.vivado.project.VivadoProject method)

P

parse() (tsfpga.registers.parser.RegisterParser method) post_build() (tsfpga.vivado.project.VivadoProject method) pre_build() (tsfpga.module.BaseModule method) (tsfpga.vivado.project.VivadoProject method) pre_create() (tsfpga.vivado.project.VivadoProject method)

print_latest_status() (tsfpga.build_project_list.BuildReport method) print_status() (tsfpga.build_project_list.BuildResult method) project_file() (tsfpga.vivado.project.VivadoProject method) project_name (tsfpga.vivado.build_result.BuildResult attribute) (tsfpga.vivado.ip_cores.VivadoIpCores attribute)

R

Ramb18 (class in tsfpga.vivado.build_result_checker) Ramb36 (class in tsfpga.vivado.build_result_checker) range (tsfpga.registers.bit.Bit property) (tsfpga.registers.bit_vector.BitVector property) (tsfpga.registers.register_field.RegisterField property) read_file() (in module tsfpga.system_utils) read_last_lines_of_file() (in module tsfpga.system_utils) recognized_bit_items (tsfpga.registers.parser.RegisterParser attribute) recognized_bit_vector_items (tsfpga.registers.parser.RegisterParser attribute) recognized_constant_items (tsfpga.registers.parser.RegisterParser attribute) recognized_register_array_items (tsfpga.registers.parser.RegisterParser attribute) recognized_register_items (tsfpga.registers.parser.RegisterParser attribute) Register (class in tsfpga.registers.register) RegisterArray (class in tsfpga.registers.register_array) RegisterCGenerator (class in tsfpga.registers.register_c_generator) RegisterCodeGenerator (class in tsfpga.registers.register_code_generator) RegisterCppGenerator (class in tsfpga.registers.register_cpp_generator) RegisterField (class in tsfpga.registers.register_field) RegisterHtmlGenerator (class in tsfpga.registers.register_html_generator) RegisterList (class in tsfpga.registers.register_list) RegisterMode (class in tsfpga.registers.register) RegisterParser (class in tsfpga.registers.parser) RegisterPythonGenerator (class in tsfpga.registers.register_python_generator)

registers (tsfpga.module.BaseModule property) registers_hook() (tsfpga.module.BaseModule method) RegisterVhdlGenerator (class in tsfpga.registers.register_vhdl_generator) report() (tsfpga.vivado.build_result.BuildResult method) report_length_lines (tsfpga.build_project_list.BuildResult attribute) resource_name (tsfpga.vivado.build_result_checker.DspBlocks attribute) (tsfpga.vivado.build_result_checker.Ffs attribute) (tsfpga.vivado.build_result_checker.LogicLuts attribute) (tsfpga.vivado.build_result_checker.LutRams attribute) (tsfpga.vivado.build_result_checker.Ramb18 attribute) (tsfpga.vivado.build_result_checker.Ramb36 attribute) (tsfpga.vivado.build_result_checker.SizeChecker attribute) (tsfpga.vivado.build_result_checker.Srls attribute) (tsfpga.vivado.build_result_checker.TotalLuts attribute) (tsfpga.vivado.build_result_checker.Uram attribute) run() (tsfpga.build_project_list.BuildProjectBuildWrapper method) (tsfpga.build_project_list.BuildProjectCreateWrapper method) (tsfpga.build_project_list.BuildProjectOpenWrapper method) (tsfpga.formal_project.FormalProject method) (tsfpga.formal_project.FormalTestCase method) run_command() (in module tsfpga.system_utils) run_formal() (tsfpga.yosys_project.YosysProject method) run_vivado_gui() (in module tsfpga.vivado.common) run_vivado_tcl() (in module tsfpga.vivado.common)

S

SbyWriter (class in tsfpga.sby_writer) set_compiled_libraries() (tsfpga.formal_project.FormalTestCase method) set_report_length() (tsfpga.build_project_list.BuildReport method) (tsfpga.build_project_list.BuildResult method) set_src_files() (tsfpga.formal_project.FormalTestCase method) setup_formal() (tsfpga.module.BaseModule method) setup_vunit() (tsfpga.module.BaseModule method) size_summary() (tsfpga.vivado.build_result.BuildResult method)

SizeChecker (class in tsfpga.vivado.build_result_checker) Srls (class in tsfpga.vivado.build_result_checker) step_is_synth (tsfpga.build_step_tcl_hook.BuildStepTclHook property) success (tsfpga.vivado.build_result.BuildResult attribute) svn_commands_are_available() (in module tsfpga.svn_utils) svn_local_changes_are_present() (in module tsfpga.svn_utils) synthesis_size (tsfpga.vivado.build_result.BuildResult attribute) system_is_windows() (in module tsfpga.system_utils)

T

test_case_name() (tsfpga.module.BaseModule static method) test_name (tsfpga.formal_project.FormalConfig property) ThreadSafeCollectArtifacts (class in tsfpga.build_project_list) to_archive() (tsfpga.vivado.simlib_common.VivadoSimlibCommon method) to_tcl_path() (in module tsfpga.vivado.common) TotalLuts (class in tsfpga.vivado.build_result_checker) translate() (tsfpga.registers.html_translator.HtmlTranslator method) tsfpga module tsfpga.about module tsfpga.build_project_list module tsfpga.build_step_tcl_hook module tsfpga.constraint module tsfpga.create_vhdl_ls_config module tsfpga.formal_project module tsfpga.git_simulation_subset module tsfpga.git_utils module tsfpga.hdl_file module tsfpga.ip_core_file module tsfpga.module module tsfpga.module_documentation module tsfpga.module_list module tsfpga.registers module tsfpga.registers.bit module tsfpga.registers.bit_vector module tsfpga.registers.constant module tsfpga.registers.html_translator module tsfpga.registers.parser module tsfpga.registers.register module tsfpga.registers.register_array module

tsfpga.registers.register_c_generator module tsfpga.registers.register_code_generator module tsfpga.registers.register_cpp_generator module tsfpga.registers.register_field module tsfpga.registers.register_html_generator module tsfpga.registers.register_list module tsfpga.registers.register_python_generator module tsfpga.registers.register_vhdl_generator module tsfpga.sby_writer module tsfpga.svn_utils module tsfpga.system_utils module tsfpga.vhdl_file_documentation module tsfpga.vivado module tsfpga.vivado.build_result module tsfpga.vivado.build_result_checker module tsfpga.vivado.common module tsfpga.vivado.hierarchical_utilization_parser module tsfpga.vivado.ip_cores module tsfpga.vivado.logic_level_distribution_parser module tsfpga.vivado.project module tsfpga.vivado.simlib module tsfpga.vivado.simlib_commercial module tsfpga.vivado.simlib_common module tsfpga.vivado.simlib_ghdl module tsfpga.vivado.tcl module tsfpga.yosys_project module

U

Uram (class in tsfpga.vivado.build_result_checker)

V

validate_scoped_entity() (tsfpga.constraint.Constraint method) verilog_header_file_ending (tsfpga.hdl_file.HdlFile attribute) verilog_source_file_ending (tsfpga.hdl_file.HdlFile attribute) vhdl_file_ending (tsfpga.hdl_file.HdlFile attribute) VhdlFileDocumentation (class in tsfpga.vhdl_file_documentation) vivado_project_file (tsfpga.vivado.ip_cores.VivadoIpCores property) VivadoIpCoreProject (class in tsfpga.vivado.project)

VivadoIpCores (class in tsfpga.vivado.ip_cores) VivadoNetlistProject (class in tsfpga.vivado.project) VivadoProject (class in tsfpga.vivado.project) VivadoSimlib (class in tsfpga.vivado.simlib) VivadoSimlibCommercial (class in tsfpga.vivado.simlib_commercial) VivadoSimlibCommon (class in tsfpga.vivado.simlib_common) VivadoSimlibGhdl (class in tsfpga.vivado.simlib_ghdl) VivadoTcl (class in tsfpga.vivado.tcl)

W

width (tsfpga.registers.bit.Bit attribute) (tsfpga.registers.bit_vector.BitVector property) (tsfpga.registers.register_field.RegisterField property)

write_sby() (tsfpga.sby_writer.SbyWriter static method)

Y

YosysProject (class in tsfpga.yosys_project)